The industry of semiconductor manufacturing involves highly complex techniques for integrating circuits into semiconductor materials. One of the techniques includes photolithography, which involves using a combination of etching and deposition processes to transfer patterns from a photomask or reticle to a layer of photoresist. The patterned photoresist layers are used to selectively etch semiconductor substrates that form the IC devices. A typical photomask, or light-blocking mask, is made of a quartz (glass) substrate that supports a patterned layer of opaque material, such as chrome. For instance, one type of light blocking mask is a phase shift mask, or PSM. Other types of masks include advanced phase shift masks, such as embedded attenuating phase shift masks (EAPSM) and alternating phase shift masks (APSM).
Due to the large scale of circuit integration and the decreasing size of semiconductor devices, the semiconductor manufacturing process is prone to processing defects. Inspection and test procedures are therefore critical for quality control purposes. Specific inspection and testing procedures have been developed for the photolithography processes. Current techniques for inspecting a photomask involve obtaining and displaying binary images of the patterns within the photomask or photoresist. Binary images contain individual pixels that are one of two shades, typically black or white. In some instances, the image of a portion of the photomask pattern maps to less than an entire pixel on a display screen. The specific binary display technique either displays such a pixel as black or white. Unfortunately, an inspection operator is unable to determine the shape, size, etc. of the portion of the photomask within this pixel. As a result, the binary image representation technique is limited in its ability to describe the shape and dimensions of a photolithography pattern. As such, current photomask inspection processes could be improved by overcoming this limitation.
Current display techniques are also commonly limited in the speed with which representations can be displayed. Specifically, large-scale (low magnification) representations of photolithography patterns require large amounts of memory, processing power, and processing time because such representations involve rasterizing each of the many features within a pattern. The slow speed of image rasterizing can require inspection processes to be performed off-line from a semiconductor fabrication process. This in turn can reduce the final total yield for a fabrication process. Since, the semiconductor industry constantly strives for increased yields, it would be very beneficial to develop faster photolithography pattern imaging techniques.
In sum, current photolithography inspection techniques can be improved in the aspects of speed and accuracy.